1. Field of the Invention
The present invention relates to a dielectric ceramic composition, and more particularly to a dielectric ceramic composition, which can be sintered at a low temperature without decrease of a dielectric constant, making it possible to make ultra thin-layered dielectrics, and a multilayer ceramic chip capacitor using the same.
2. Description of the Related Art
With the recent advance of the electronic devices industry, there is an increasing requirement to develop smaller-sized electronic parts with larger capacitance. Multilayer ceramic chip capacitors form a multi-layered structure by alternating electrode layers and high dielectric constant-based ceramic layers. They are widely used as electronic parts featuring a small size and large capacitance.
Relatively inexpensive base metals such as Ni and Ni alloys have been used as internal electrodes in place of expensive noble metals such as Ag and Pd in multilayer ceramic chip capacitors. The internal electrodes made of Ni may be oxidized upon being sintered in air. Therefore, co-sintering of dielectric layers and internal electrodes must be effected in a reducing atmosphere. However, sintering in a reducing atmosphere causes the dielectric layers to be reduced, resulting in a lower resistivity. Non-reducible dielectric ceramic materials were thus proposed.
An exemplary non-reducible dielectric ceramic composition for dielectric ceramic chip capacitors using Ni for inner electrodes is disclosed in Japanese Patent Application Laid-Open Publication No. 2000-311828. The dielectric ceramic composition comprises BaTiO3: 100 mol, at least one selected from MgO, CaO, BaO, SrO and Cr2O3: 0.1 to 3 mol, (Ba, Ca)xSiO2+x (provided that x=0.8 to 1.2): 2 to 12 mol, at least one selected from V2O5, MoO3 and WO3: 0.1 to 3 mol, and an oxide of R (R is at least one selected from Y, Dy, Tb, Gd and Ho): 0.1 to 10 mol. This composition satisfies X7R characteristics (EIA standard), and change of capacitance with time under a direct current electric field and decrease of capacitance are small. Despite these advantages, a sintering temperature is too high, 1,270° C.
If a sintering temperature is high, a Ni internal electrode layer shrinks at a lower temperature than a dielectric ceramic layer, thereby causing interfacial delamination of the two layers. Furthermore, due to lumping between internal electrode layers, short circuit between internal electrodes is liable to occur. In particular, when the thickness of each dielectric layer is reduced to 5 μm or less in order to provide multilayer ceramic chip capacitors of large capacitance and small size, short circuit between internal electrodes may more frequently occur at a high sintering temperature. For this reason, the dielectric ceramic composition for ultra thin-layered ceramic chip capacitors having Ni internal electrodes must be sintered at a low temperature of 1,200° C. or less. In addition to the above, much higher voltage is applied on dielectric materials when dielectric ceramic layers are thinned, often causing troubles such as decrease of a dielectric constant and a poor temperature characteristic of capacitance (hereinafter, also referred to as “TCC”). Furthermore, the rate of change of capacitance depending on DC bias is increased. Especially, when the thickness of each dielectric layer is reduced to 3 μm or less, a smaller number of ceramic particles are contained between inner electrodes, making it difficult to assure stable dielectric properties.
An exemplary low temperature sinterable, thin and multi-layered ceramic chip capacitor is disclosed in U.S. Pat. No. 6,243,254. The dielectric ceramic composition for this capacitor contains a major component expressed by the general formula: (Ba1-xCaxO)mTiO2+α Re2O3+β MgO+γMnO) (Re is at least one selected from the group consisting of Y, Gd, Tb, Dy, Ho, Er and Yb), and 0.2 to 5.0 parts by weight of either a first minor component Li2O—(Si,Ti)O2—Mn (MO is at least one selected from Al2O3 and ZrO2) or a second minor component SiO2—TiO2—XO-based oxide (XO is at least one selected from BaO, CaO, SrO, MgO, ZnO and MnO), per 100 parts by weight of the major component. The dielectric composition can be sintered at a low temperature of 1,250° C. or less and a temperature characteristic of capacitance satisfies X7R characteristics stipulated under the EIA standard. However, when the thickness of each dielectric layer is reduced to 3 μm or less, a dielectric constant is greatly decreased to the level of 1,130 to 2,900. In this regard, it is difficult to prepare capacitors with large capacitance.